Chinese IP and custom chip company Innosilicon has completed the world's first chip tape-out and testing based on SMIC's FinFET N+1 process, the Zhuhai government's Zhuhai Special Zone Newspaper reported on October 11, adding that all of its IP is made in China and its functionality passed the test in one go.
Regarding the N+1 process, SMIC co-CEO Mong-Song Liang had revealed earlier this year that the process is very similar to the 7nm process in terms of power and stability, and does not require a EUV lithography machine.
But the performance improvement is not enough, so the N+1 process is for low-power applications, Liang said.
And tape-out success means getting devices that meet performance targets in the lab. If you want to achieve real mass production, the reliability of the device, degradation mechanism, and some other characteristics need a lot of data support and repeated testing, local media Guancha.cn said citing experts.
Zhuhai Special Zone News reported that Innosilicon's first chip tape-out and successful testing based on SMIC's advanced process not only means that the 'domestic core' with independent intellectual property rights has once again broken the foreign monopoly but also shows that China-made 7nm chip manufacturing. The technology has been broken.
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In fact, tape-out is a necessary step before a chip can be mass-produced.
In order to test the success of the IC design, the chip needs to be pre-produced to verify that the circuit has the required performance and functionality.
If the tape-out is successful, the chip can be mass-produced; if not, the cause of the problem needs to be identified and the design needs to be optimized accordingly.
Guancha.cn quoted someone from the Semiconductor Institute of the Chinese Academy of Sciences as saying: "Before the technology is delivered, it will go through a user trial phase, in different cases, and maybe tape-out will be followed by months or years before mass production can actually take place."
On September 18, SMIC had said that FinFET N+1 has entered the customer introduction phase and is expected to go into small-batch pilot production by the end of 2020.
Although SMIC has never confirmed it, there has been speculation that "N+1" is the company's 7nm process.
In February, Liang disclosed for the first time at the earnings meeting that the N+1 and 7nm processes are very similar in terms of power and stability, with the only difference in performance being that the N+1 process is less efficient.
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When it comes to specific data, he revealed that SMIC's N+1 process has a 20% performance increase and 57% power consumption reduction compared to 14nm.
The 7nm process market benchmark performance improvement should be 35%, so the company's N+1 process is for low-power applications.
Previously, SMIC had ordered a EUV lithography machine for next-generation process manufacturing, worth up to $150 million, from ASML, which was scheduled to be delivered in early 2019.
But the U.S. government has blocked the deal, which has yet to be completed.
In the current plan, N+1 and N+2 processes will not use EUV equipment, until the equipment is ready, N+2 will turn to use EUV equipment.
Previously, it was reported that SMIC's 7nm process development is similar to the TSMC route, 7nm node development of a total of three processes, respectively, low-power N7, high-performance N7P, the use of EUV process N7+.
It should be noted that at present, the world can mass produce 7nm chip foundries only TSMC and Samsung.
IDM manufacturer Intel 10nm products have just recently been launched, 7nm chips may be delayed until 2023. guancha.cn reported that this means that SMIC is expected to catch up with Intel in the process.
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